Device Chip References

Sources:

submodules/devicelibrary/Devices/LTC2992_Datasheet_Reference.md

submodules/devicelibrary/Devices/TPS23881/TPS23881_DATASHEET_REFERENCE.md

These are extracted datasheet references used for driver validation and development. Refer to the original source files for the complete register maps.

LTC2992 — Dual Power Monitor

Manufacturer: Analog Devices Source: LTC2992_Datasheet_Reference.md Used on: ESH10000533 (M.2 PSU Module) and related power monitoring modules

Key Specs

Dual-channel power/voltage/current monitor
12-bit ADC (default) or 8-bit
I2C interface
Measures: voltage (SENSE+), current (ΔSense), power, GPIO pins

ADC LSB Step Sizes (12-bit mode)

Signal	LSB	Full Scale
SENSE+ (V1, V2)	25 mV	102.4 V
GPIO (G1–G4)	0.5 mV	2.048 V
ΔSENSE (I1, I2)	12.5 µV	51.2 mV
Power (P1, P2)	312.5 nW	~5.24 W

Power formula: POWER_LSB = SENSE+_LSB × ΔSENSE_LSB = 25 mV × 12.5 µV = 312.5 nW Divide raw power register by RSENSE (Ω) to get Watts.

ADC resolution: NADC[7] = 0 → 12-bit (default), NADC[7] = 1 → 8-bit.

I2C Addressing (7-bit)

ADR1	ADR0	Address
H	H	0x67
H	NC	0x68
H	L	0x69
NC	H	0x6A
NC	NC	0x6B
NC	L	0x6C
L	H	0x6D
L	NC	0x6E
L	L	0x6F

Mass Write: 0x66 — Alert Response: 0x0C

Key Register Addresses

Register	Address	R/W	Description
CTRLA	0x00	R/W	Control register A
CTRLB	0x01	R/W	Control register B
NADC	0x04	R/W	ADC resolution select
P1	0x05–0x07	R	Power channel 1 (24-bit)
I1	0x14–0x15	R	Current channel 1 (12-bit)

Full register map: source file

TPS23881 — PoE PSE Controller

Manufacturer: Texas Instruments Source: TPS23881_DATASHEET_REFERENCE.md Used on: ESH10000534 (PoE M.2 Module) Datasheet: SLVSF02E (March 2019, revised May 2023)

Key Specs

8-channel PSE controller (4 ports × 2 channels)
IEEE 802.3bt Type 3/4 (2-pair and 4-pair PoE)
I2C interface up to 400 kHz
RSENSE = 0.200 Ω
2-pair PCUT: 2 W – 65 W
4-pair PCUT: 4 W – 127 W (±2.5% accuracy)
16 kB programmable SRAM
VDD: 3.0 V – 3.6 V; VPWR: 44 V – 57 V

Operating Modes

Value	Mode	Description
0b00	OFF	Channel off
0b01	Manual/Diagnostic	Manual detection, classification, power control
0b10	Semi-Auto	Auto detect/classify; manual power-on
0b11	Auto	Fully automatic — detect, classify, power on

I2C Addressing

Address pins A1–A4 (pulled up internally to VDD)
Config A (nbitACC=0): two 4-channel devices at consecutive slave addresses
Config B (nbitACC=1): single device address (A0=0)
Broadcast address available

Key Register Addresses

Address	Register	R/W	Description
0x00	INTERRUPT	RO	Interrupt status
0x01	INTERRUPT MASK	R/W	Interrupt mask
0x02	POWER EVENT	RO	Power good/enable events
0x04	DETECTION EVENT	RO	Detection/classification events
0x06	FAULT EVENT	RO	Disconnect/PCUT faults
0x0C–0x0F	CHANNEL 1–4 DISCOVERY	RO	Detection result + class
0x10	POWER STATUS	RO	Power good and enable status

Full register map: source file